In an integrated circuit, CMOS transistors are frequently used to keep power consumption of the integrated circuit to a minimum. These CMOS transistors may be used as building blocks to create a wide variety of logic circuits Since many CMOS transistors are formed on a single die, it is desirable to make the CMOS transistors very small, resulting in these CMOS transistors having only low current handling capability. To increase the low current output signal of CMOS transistors in order to overcome the parasitic capacitance, inductance, and resistance of conductors and components connecting the output of the CMOS transistors to a subsequent stage, drivers are typically incorporated throughout the integrated circuit to receive the low current output of the CMOS transistors and output a much higher current to drive one or more subsequent stages.
One typical use of CMOS transistors is in programmable gate arrays, including sea of gates, where the various input and output terminals of a plurality of low current CMOS transistors grouped within cells are programmably interconnected, using mask, electrical, or laser programming techniques, to form any number of logic circuits (macrocells). However, due to the low current output of the individual CMOS transistors, in order to drive a relatively high capacitance load, such as in the case of a fan out, a plurality of CMOS transistors must be connected in parallel to increase the current output and, thus, ensure high speed and reliable operation of the integrated circuit.
A faster and more area efficient means for driving high capacitance loads is to drive the loads with bipolar transistors. Such circuits, which have become increasingly popular, are generally known as BiCMOS circuits.
Typically, in each cell of a programmable BiCMOS gate array comprising a plurality of CMOS transistors, two bipolar devices are used as the BiCMOS driver in a totem-pole configuration as shown in the macrocell of FIG. 1. Representative channel widths and channel lengths of the MOSFETs are shown. Pull-up and pull-down bipolar transistors are used frequently as driver transistors instead of large MOSFETs due to their fast switching speeds and low parasitic capacitance.
The representative prior art circuit of FIG. 1 shows a CMOS device comprising low current handling transistors Q1 and Q2 having gates coupled to input terminal 8. N-channel low current handling transistors Q3 and Q4 are coupled in series, with the gate of transistor Q3 coupled to input terminal 8 and the gate of transistor Q4 coupled to the output of the CMOS device. Also, coupled to the output of the CMOS device is the base of high current NPN bipolar transistor Q5, acting as a pull-up device. The common node of transistors Q3 and Q4 is coupled to the base of high current NPN bipolar transistor Q6, acting as a pull-down device N-channel transistors Q3 and Q4 are used to prevent a full high level input voltage (e.g., 5 volts) from being directly applied to the base of bipolar pull-down transistor Q6. Bipolar transistors Q5 and Q6 are connected in series between supply voltage terminal 10 and ground terminal 12. The output of the driver circuit comprising bipolar transistors Q5 and Q6 is at the common node of transistors Q5 and Q6.
Thus, when an input signal applied to input terminal 8 is high, this high signal will be inverted by the CMOS device, and bipolar transistor Q5, as well as N-channel transistor Q4, will be off. The high input signal applied to the gate of N-channel transistor Q3 will turn transistor Q3 on as well as turn bipolar transistor Q6 on, since the source of transistor Q3 will rise with an increased gate voltage. Thus, output terminal 16 will be pulled down to approximately 0.7 volts.
Conversely, when the input signal applied to input terminal 8 is low, transistor Q5 will turn on, while transistor Q6 will turn off, causing a high voltage to be applied to output terminal 16.
In a programmable BiCMOS gate array, the driver circuits may be located in each cell or remote from the CMOS transistors. The driver circuits may or may not be used for a specific configuration of the CMOS gates, depending on whether the CMOS gates themselves provide a sufficiently high output current to adequately drive a subsequent stage. Thus, in addition to the conventional bipolar driver circuits using a large portion of the die area due to the size of the bipolar transistors and due to the additional MOSFETs needed to prevent a full high level input voltage from being directly applied to the base of the bipolar pull-down transistor, many of these driver circuits may not even be required for a specific application, leaving a large portion of the die area unused.
Accordingly, it would be desirable to incorporate driver circuits in integrated circuits which require a minimum of die area but still possess fast switching speeds and high current capability.